The present invention relates to a semiconductor device and a method for manufacture thereof, and more particularly to a semiconductor device including an field effect transistor.
In an integrated circuit using SiMOS field effect transistors (Si-MOSFET's), the coexistence of the reduction in power consumption and the enhancement in speed has been attained by making the reduction in device dimension, the reduction in operating voltage and so forth in accordance with a so-called scaling rule.
However, there have arisen many problems including the problem of a short-channel effect generated in association with the reduction in dimension and the problem of that deterioration of an operation margin caused by the closeness of a drain voltage and a threshold voltage to each other which becomes remarkable in the case where the reduction in voltage is contemplated.
Also, when eyes are turned to the mobility which makes a barometer for the enhancement in speed, the various improvements as mentioned above are ironically enough caught in the result that the mobility in Si in the real device is smaller than 100 or is far less than the value of mobility in bulk.
Thus, a further improvement of the performance of the conventional Si-MOSFET has become very difficult.